STS-FlexTestGT Hardware Compatibility Issues		BKT 09-Jun-05

What has to be done to make the hardware compatible with both
STS and FlexTestGT software:

1)  FlexTestGT first I/O carrier slot is 3, which they typically set up
    with address 0xC2000000, with subsequent board addresses incremented
    by 0x00200000.  STS assumes the address of VME slot 3 is 0xC2200000.

    Solution is to keep the STS slot-address convention, and change
    FlexTest's hardware initialization (ftgt.hwi) file to reflect this.

2)  FlexTestGT assumes if there is a GRESIII board in the chassis, then
    it is the master clock source.  Changing the "MASTER" keyword in
    FlexTest's hardware initialization (ftgt.hwi) file to "SLAVE" will
    not work.

    Solution is that STS must use the GRESIII as the master clock source,
    rather than the first I/O carrier.


